Compilers have become part and parcel of today’s computer systems. They are responsible for making the user’s computing requirements, specified as a piece of program, understandable to the underlying machine. There tools work as interface between the entities of two different domains – the human being and the machine. The actual process involved in this transformation is quite complex. Automata Theory provides the base of the course on which several automated tools can be designed to be used at various phases of a compiler. Advances in computer architecture, memory management and operating systems provide the compiler designer large number of options to try out for efficient code generation. This course on compiler design is to address all these issues, starting from the theoretical foundations to the architectural issues to automated tools. Being primarily targeted to a one-semester course for the undergraduate students, the course will follow the current GATE syllabus, enabling the students to prepare well for the same. It can also help all other participants looking for an introduction to the domain of compiler designs and code translators.
INTENDED AUDIENCE
Undergraduate students of CSE, IT, B.Sc (Computer Science), MCA, MS (Computer Science)
INDUSTRY SUPPORT
All software industries
ABOUT THE INSTRUCTOR
Santanu Chattopadhyay received his BE degree in Computer Science and Technology from Calcutta University (B.E. College) in 1990. He received M.Tech in Computer and Information Technology and PhD in Computer Science and Engineering from Indian Institute of Technology Kharagpur in 1992 and 1996, respectively. He is currently a Professor in the Department of Electronics and Electrical Communication Engineering, IIT Kharagpur. Prior to this, he had been a faculty member in the IIEST Sibpur and IIT Guwahati in the departments of Computer Science and Engineering. In both these places he has taught the subject of Compiler Design several times. His research interests include Digital Design, Embedded Systems, System-on-Chip (SoC) and Network-on-Chip (NoC) Design and Test, Power- and Thermal-aware Testing of VLSI Circuits and Systems. He has published more than 150 papers in reputed international journals and conferences. He has published several text and reference books on Compiler Design, Embedded Systems and other related areas. He is a senior member of the IEEE and an Associate Editor of IET Circuits Devices and Systems journal.
Additional information
Institute
IIT KGP
Total hours
30
Certification Process
1. Join the course
Learners may pay the applicable fees and enrol to a course on offer in the portal and get access to all of its contents including assignments. Validity of enrolment, which includes access to the videos and other learning material and attempting the assignments, will be mentioned on the course. Learner has to complete the assignments and get the minimum required marks to be eligible for the certification exam within this period.
COURSE ENROLMENT FEE: The Fee for Enrolment is Rs. 3000 + GST
2. Watch Videos+Submit Assignments
After enrolling, learners can watch lectures and learn and follow it up with attempting/answering the assignments given.
3. Get qualified to register for exams
A learner can earn a certificate in the self paced course only by appearing for the online remote proctored exam and to register for this, the learner should get minimum required marks in the assignments as given below:
CRITERIA TO GET A CERTIFICATE
Assignment score = Score more than 50% in at least 9/12 assignments.
Exam score = 50% of the proctored certification exam score out of 100
Only the e-certificate will be made available. Hard copies will not be dispatched.”
4. Register for exams
The certification exam is conducted online with remote proctoring. Once a learner has become eligible to register for the certification exam, they can choose a slot convenient to them from what is available and pay the exam fee. Schedule of available slot dates/timings for these remote-proctored online examinations will be published and made available to the learners.
EXAM FEE: The remote proctoring exam is optional for a fee of Rs.1500 + GST. An additional fee of Rs.1500 will apply for a non-standard time slot.
5. Results and Certification
After the exam, based on the certification criteria of the course, results will be declared and learners will be notified of the same. A link to download the e-certificate will be shared with learners who pass the certification exam.
CERTIFICATE TEMPLATE
Course Details
Week 1 : Introduction Week 2 : Lexical Analysis Week 3 : Parsing – Part I Week 4 : Parsing – Part II Week 5 : Parsing – Part III Week 6 : Syntax Directed Translation Week 7 : Type Checking and Symbol Tables Week 8 : Runtime Environment Management – Part I Week 9 : Runtime Environment Management – Part II Week 10 : Intermediate Code Generation – Part I Week 11 : Intermediate Code Generation – Part II Week 12 : Intermediate Code Generation – Part III
Reviews
There are no reviews yet.