Workshop on ARM based SoC Design – Batch 5

SKU: Start Date: November 11, 2024 Category:

Description

The objective of the course is to provide a thorough theoretical understanding and practice with ARM based SoC design and simulation of peripherals using EDA tools.

Session Date : 11th November, 2024

Duration : 65 Hours (Theory : 13 hours & Lab : 52 hours)

Profile of the Instructor(s)

Mr. Nandakumar.R

Scientist ‘D’, NIELIT Calicut

 

Educational Qualifications:

M.E (ECE) , MBA

 

Experience : 15 Years

 

Position and organization:

Scientist, NIELIT Calicut, Electronic System Engineering, VLSI/ASIC/IPCore Design, Training

Adhoc Faculty, NIT Calicut

 

AWARDS:

  1. IEEE Outstanding Young Professional Award (R10-Asia Pacific) 2015

 

R & D Labs Co-Established at NIELIT Calicut

  1. Advanced VLSI System Design Lab
  2. Chip to System Design Lab
  3. Swadeshi Microprocessor-based Remote Embedded System Design Lab
  4. Skilled Manpower Advance Research and Training (SMART) Facility

 

Mr Sreejeesh SG

Senior Technical Officer, NIELIT Calicut

 

Educational Qualifications:

M.Tech (By Research) , B.Tech (ECE)

 

R&D EXPERIENCE: 15+Years 

 

Position and Organization:

Senior Technical Officer, NIELIT Calicut (VLSI/FPGA/ASIC/IPCore Design, Training) – 15 years.

 

R & D Labs Co-Established at NIELIT Calicut

  1. Advanced VLSI System Design Lab
  2. Funded R & D Lab for Medical Ultrasound research
  3. Chip to System Design Lab
  4. Swadeshi Microprocessor-based Remote Embedded System Design Lab
  5. Skilled Manpower Advance Research and Training (SMART) Facility

Topics Covered

  1. Introduction to Verilog HDL & Hierarchical Modelling Concepts
  2. AHB Light bus architecture
  3. Building a System on Chip- Integrating AHB peripherals to ARM
  4. UART, Timer, MEMORY, GPIO etc.

Intended Audience

Engineering students, recent graduates and young professionals with back ground in Digital Electronics.

BE/B.Tech (ECE/EEE/AEI/CSE/IT/Biomedical/Medical Electronics, Mechatronics and allied branches) / M.Sc. (Electronics/CS) or Ongoing with 3rd semester completed.

This Workshop  is intended to give  participants a quick start and hands on practice needed for implementing  cutting edge projects especially in domains like  VLSI, Embedded Systems, Computer Architecture, Communication, DSP, Control and automation  Biomedical etc., targeting FPGA /ASIC.

Perquisites for the program

Verilog HDL Knowledge / Lab Workshop on  FPGA Architecture and Programming using Verilog HDL /Lab Workshop on ARM Based SoC Design/Lab Workshop on Advanced ARM SoC Design.

Certification

50 % for assignments and 50 % for exit test

Mode of Delivery

Theory sessions shall be delivered through ONLINE mode using recorded lectures by NPTEL.

Lab demo (recorded) and live sessions shall be delivered through ONLINE mode by NIELIT Calicut.

Lab experiments and Mini Project shall be done using resources at participant’s computer using Freeware Tools/Evaluation Version of Industry standard EDA Tools.

Registration

Selection will be based on ‘first come first serve basis’ among eligible registrants. Registration will be closed once sufficient number of candidates for a batch has registered.

Welcome mail will be sent by NIELIT Calicut to their registered email a day prior to start day of the course.

Registration Link :

https://rzp.io/l/NmYYU9e

Support Desk

Workshop Coordinator: 

Name : R. Nandakumar

Phone : 9995427802

Mail ID : nanda@nielit.gov.in, nanda@calicut.nielit.in

For Queries/Support : 

Name : S.G Sreejeesh

Phone : 9447769756

Mail ID : sreejeesh@nielit.gov.in, sree@calicut.nielit.in

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